Tag Archives: IEEE

So some time back, I did a few blogs about how much I like writing VHDL and what a wonderfully language it is. I also did a bit of an intro for software engineers (don’t worry, you don’t need to read them to see where I’m going here). However, I came under a bit of criticism about what I wrote and my use of the evil STD_LOGIC_ARITH package. OK, I may not be a full-time VHDL engineer but I think there are far too many people being sheep and using the numeric library though peer pressure while not considering true engineering principles. So first off, let’s get this all straight – I class myself as a embedded electronics design engineer. My day job is all low-level electronics and microcontrollers, no FPGAs. However, I spent a few years working on a VHDL design for a Gigabit Ethernet Card where I looked…

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Just before Christmas last year, I asked the powers that be whether I can attend the 2011 International Solid-State Circuits Conference (ISSCC). The last and only time I’ve attended ISSCC was back in 2007 when I went with a colleague. For those that have followed my own personal blog, you’ll know him as the Psycho Colleague. For those that haven’t, let’s just say the metaphor fits him well. This past week, I was told that my request to attend ISSCC has been denied. No money in Q1; but it’s not all bad news. I’ve been approved to attend a conference of my choice in Q2, Q3, or Q4. This decision gave me pause — any conference in Q2-Q4? This got the hamsters running and kicked off a process of conference ranking in my head. I started to think about some of the more memorable papers that I’ve read. I tried…

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