Category Archives: Electrical Engineering

When a friend recently found out I was working as an engineer, he said, “I never saw you as the worker bee type.” It was a good assessment of my personality, but not a good assessment of my job. All engineering jobs don’t require one to become a worker bee. Because the theme this week is engineering salary, it’s a good time to talk about what I do and do not expect from a job especially as I hope to go into academia (which, as far as I know, is different from my fellow bloggers here). There is a down side to this career path…or two, rather. The first is the stiff competition for open jobs. (Let’s pretend for a moment that it’s not there.) The second is the pay. As a grad student, I’ve averaged around $20k for an annual salary. That may not sound like a lot, but…

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It’s been a few weeks now, but I was advising a few younger friends about starting salaries and thought it’d be interesting to write about. They are entering the work force for the first time. And while there are often career services available at a lot of schools, they often don’t provide the perspectives that other engineers might be able to offer. So yeah…I guess that other perspective is…me! At least one of the many perspectives you can get. You can ask just about anyone. So what do I have to say about it? Only what I know so far. First, you might be surprised at what you’re making when coming out of school. Unless you have a badass co-op or internship while you are in school, you’ll be earning a lot more money than you’d be used to. But here’s the part you might not realize: Your salary might…

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For many electrical engineers, the complex s-plane, where upon the plotting of Laplace transforms take place, is something very familiar. Often, it’s used to plot the poles and zeros of a transfer function, be it open or closed loop. For a feedback amplifier circuit to be stable, for example, the open loop poles must be located on the left half of the s-plane. The s-plane can be used to plot the root locus of a transfer function, something that is useful in analyzing a loop’s stability. It’s also good for plotting impedances of circuit structures or components. For example, passive devices lives entirely on the right side of the s-plane since real-life passive devices can only have positive real impedances. This last point is important and I’ll return to it later in the post. What’s less familiar to most electrical engineers is the Smith chart. In fact, some EEs I’ve…

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On last week’s Amp Hour, Chris and Dave were discussing laser etching PCBs. I’m not sure they realized it, but this is actually a fairly hot area in PCB processing research right now, along with printed electronics. Currently, PCBs are processed by copper-cladding a substrate material, like FR-4. There are a couple ways to get the circuit layout onto the board. The first possibility is that the circuit layout is printed onto the board using screen printing. The copper you want to keep is covered in an impermeable ink. A second method uses a photomask. The areas you want to keep are exposed to light, which will harden the mask. The unexposed areas are still soft and removed chemically. The final step in both processes involves removal of unwanted copper using a chemical such as ferric chloride or ammonium persulfate. (Note: A third method can involve the use of a…

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Chris hates working alone. Fluxor has suggestions for interview questions. And some people wonder why you should bother with a behavioral interview. My perspective on some of these this is different because I am working with an interdisciplinary team. In a lot of companies, electrical engineers are separated from mechanical engineers, even when working on the same project. They may approach projects in stages, or maybe they work on completely different things. The wonderful thing about where I work is that I inhabit a world full of electrical engineers, each of whom have a different specialization. There are also a smaller number of mechanical engineers and sometimes we deal with chemists and/or material scientists. Because of the nature of the projects we are working on, we work together relatively closely, probably far more than if we were working at a regular business. Interdisciplinary research has a lot of advantages, but…

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Interview Strengths

Last week, I wrote about an interview with a disappointing candidate that was applying for a analog IC design position with FluxCorp. Although he wasn’t able to answer many questions regarding his own past designs (or alleged designs), I still thought it necessary to give him a chance by moving to more basic questions, like the transistor. In my opinion, these questions are not difficult. If one bothers to prepare for an interview like this by flipping through some old text books, these questions should be a breeze. Unfortunately, the candidate (let’s call him Mr. Flop) in question failed horribly, which illustrates a few things. First, he doesn’t know how to prepare for an interview. Second, he has not internalized undergrad material in his brain so that he can claim to be qualified to be an analog IC designer. Third, he grossly overstated his abilities on his resume. And I’m…

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This is a repost of an article I wrote at my old blog. It’s still fairly relevant, and metamaterials is a topic I hope to spend more time discussing. The most intuitive place to start discussing metamaterials is generally index of refraction and Snell’s Law. Most people are familiar with the refraction of light by lenses…or at least I certainly hope so! If not, you may want to check out this tutorial on lenses and come back when you’re done. One of the formulas the defines the refraction of light at an interface (for linear optics anyway) is Snell’s Law. Mathematically, this is written as: What this means is that there is a relationship between the angle of the light leaving one material and the angle at which is enters the second material. When the light is in the first material, we call it in the incident beam and give…

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Just before Christmas last year, I asked the powers that be whether I can attend the 2011 International Solid-State Circuits Conference (ISSCC). The last and only time I’ve attended ISSCC was back in 2007 when I went with a colleague. For those that have followed my own personal blog, you’ll know him as the Psycho Colleague. For those that haven’t, let’s just say the metaphor fits him well. This past week, I was told that my request to attend ISSCC has been denied. No money in Q1; but it’s not all bad news. I’ve been approved to attend a conference of my choice in Q2, Q3, or Q4. This decision gave me pause — any conference in Q2-Q4? This got the hamsters running and kicked off a process of conference ranking in my head. I started to think about some of the more memorable papers that I’ve read. I tried…

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Bisphenol A has recently found to not be safe for food containers, but it has a sordid history in IC packaging.

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