
I’ve been away from EngineerBlogs.org for a couple of weeks as I’ve been traveling. I finally made it out of China, and it was about time. I flew directly to a country that shall not be named, except to say she is the top exporter of crude oil to the United States. But I didn’t linger long in oil-country, just enough to take care of some personal business before heading off to my next stop, America the Beautiful and her Keystone State. For two straight nights, I had greasy burgers and fries for dinner and I must say, it felt pretty good. I’ve now returned to oil-country and will stay here a while before going back to China again.
Despite my travels, one thing I continue to do is to interview candidates for our open analog IC design positions in China. I leave all the fancy questions, such as control theory, discrete time sampling, gain bandwidth product, gain compression, etc. for my Chinese team members to ask the candidate. I’m just a dumb engineering manager, so I ask dumb, basic questions in my interviews. Analog circuits can get quite complicated, but I’ve never asked a question thus far that required more than 5 basic electrical devices.
I’ve written on this topic before. One of my first posts on EngineerBlogs.org discussed what I expect candidates to know about the basics of transistors. Indeed, that’s how I usually start my interviews, by asking them about a single electrical device. I then move on to a two device circuit. But this time, I use even more basic devices, stuff that any EE student would learn in their first year, stuff that even other engineering disciplines learn — the resistor and capacitor. Here’s the circuit and input voltage that I present each candidate:
I ask the question two ways. First, I ask that if the input voltage was connected to node C and node A was grounded, draw me the waveform on node B. Now reverse the connections on nodes A and C. Draw me node B again. I may add some variation, such as saying that instead of node A being grounded, it is actually tied to 350V. Seems pretty straightforward. Circuits 101 stuff. What I find surprising, year after year, interviewing candidates originating from all over the world, young and old, masters and doctorates, is that half of them will answer the first part of this question wrong.
So here’s my advice. Study up on your basics before going to an interview. Because not being able to figure out a two-device RC circuit in an analog design job interview will make you look really stupid.
As for the answers to the question above, I’ll leave it as an exercise for the reader.
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What The Flux is a semi-regular weekendish feature on EngineeringBlogs.org that follows the follies and jollies of an engineer in industry, yours truly.
As a computer scientist, this remind me a lot about the «fizz-buzz» interview question, it’t the kind of stuff you thought any 1st year student should do blindfolded, yet 9 over 10 people seems to fail it according to this : http://www.codinghorror.com/blog/2007/02/why-cant-programmers-program.html
So yeah, very basic but technical interview questions seems to make sense…
I am a current Architectural Engineering student at Kansas State University, and working for a firm in Texas as a summer intern. I have never had anyone ask me questions like that in an interview; and I have been in a lot of interviews. The company’s seem more interested in the personalities matching. Is this a concern of yours or are you strictly interested in knowledge only?
Hiring is a balance of personality and technical abilities. Both are important, but the more junior the candidate is, the less weight is put on technical abilities. This is because junior candidates have very little technical knowledge to judge them on, so personality plays a bigger role. I think you’ll find that as you mature as an engineer, the style of your job interviews will evolve along with you.
Agreed! Getting stumped by basic questions is embarrassing, but very likely if you’ve been deep into niches for a while. Simple questions are valid – they give the interviewer insight about the candidate’s thought process.
Be careful when you find that the interviewer is wrong (about the answer he expects). If you challenge his opinion you may end up out the door, or hired on the spot! Once I was asked to name the “three types of current”. I was confused because basically there are two types (DC and AC) but some people define pulsating DC separately. So that’s how I answered the question. The interviewer told me I was wrong – his answer was DC, AC and battery. When I explained that DC and battery were the same he waved me off. The interview went downhill from there because I didn’t like how he treated me. When I left I figured that I’d just wasted my time. Ironically, a few days later that interviewer called to offer me the job, but because of my unfavorable impression I’d already committed to another company. Not sure if I ultimately made the best decision or not, but my point is that interviewing is a two-way street.
Recollecting the basic questions in the interview is very shy full and embrassing embarrassing. Even though some people don’t have any basic foundation regarding their subjects, they get settled into big organizations. anyway nice article!
Hello,
Although the questions asked here are reasonable, after all you see that RC thing in a PLL all the time, so it’s reasonable to ask. However, I find some basic things to ask unfair, for example what is the equation relating the drain current to gate voltage when the transistor in saturation or what are the different regions of operation for a BJT? Most people will not know this off the top of their head.
At the risk of sounding stupid, I will answer the question as posted. If the input is at C and A is at some voltage X. Initially B is also at voltage X. When C spikes up by some delta, then so will B (voltage across capacitor cannot change instantaneously)and then RC decay to voltage X.
Hello Sen, I don’t expect people to know equations in detail, but I do expect people to know relationships. For example, gate voltage is proportional to the drain current squared when the MOS device is in saturation. An experienced analog circuit designer should know this. Different regions of operation for a BJT? You better damn know this if you are interviewing for a job that involves BJT design. This is a critically important concept especially when designing biasing circuits or using active loads. If you don’t have a good grasp of transistor regions of operation, good designs will be very hard to come by. When circuits go wrong, it’ll be hard to analyze why things have gone awry.
Your answer to the question is correct for when C spikes up. When happens when C spikes down to its original voltage?
Hello,
Yes. Any analog designer should know there exists a square law relationship between gate voltage and drain current and this degrades with smaller technology nodes. The only reason I brought up the BJT question is that most engineers deal with MOSFETs almost exclusively and then when the BJT pops up it can really play tricks with them. Especially when you are not expected to work with BJTs. (Though it does reinforce the stereotype that MOSFET designers can’t work with BJTs but BJT designers can do both). Further confusing is the fact that saturation for MOSFETs is different than saturation for BJTs. (I think saturation for BJTs is when the Base-Collector and Base-Emitter are forward biased).
Another example, all RF engineers know what s parameters are…but should baseband analog designers as well?
You are correct that when things don’t work quite right it’s almost always because the transistor is not the region of operation you thought you were in for example when you run Monte Carlo analysis and the gain drops.
My ambiguity arises as to what is basic. For some, it is a fundamental intuitive understanding of what the circuit is doing. For others it is deriving the PSRR of a SF. Both are basic IMHO.
I do like your posts on analog stuff, Fluxor and it’s a shame you had to leave Canada but hopefully there can be resurgence of the IC industry when you get back.
If the input is C, and A is a fixed voltage and B is the output, this is class high pass filter. So when C spikes down by some delta X, B will spike the same amount, i.e. delta X. Then it will go back up in an RC manner till hits voltage A.
Great comment Sen. You wouldn’t happen to be an Ottawa Senators fan, would you?
hello sir Fluxor and all analog designers,
i am one of those strugguling engineer stuck up in the middle of digital or analog career ,being from electronics always hated programming wasted 2 years in digital verilog hdl designing as it is in full hype in my country (india)but still no idea how actually hdl is really done got no clue just few days back realized it was always analog BJT’s, CMOS and MOSFETs are my real friends not hdl verilog ,now wondering what to do now and how to switch from this hateful environment to the one which i love any suggestion would be helpful .,as i have no prior industrial exp. with analog design what kind of role analog designer play pls explain a bit would be very helpful.
The instant the spike at C goes high voltage at point B still be zero as sen has already explained and for the interval the step remains voltage at point B will start exponentially decaying as it will be of opposite polarity with respect to point C which is at positive polarity after the negative delta comes at point C the charge stored in cap. will start discharging through resistor and will go down to zero after some time constant (tow) of RC.
please correct me if i am wrong.
This blog is very helpful
thank you.